As we speak’s complicated system-on-chip (SoC) designs can comprise between tens to a whole lot of IP blocks. Every IP block might have its personal knowledge width and clock frequency and make use of one of many customary SoC interface protocols: OCP, APB, AHB, AXI, STBus, and DTL. Connecting all these IPs is a major problem.
Useful IP blocks hook up with the network-on-chip (NoC) by way of sockets. Within the case of an initiator IP, the socket serializes and packetizes the info generated by the IP, assigns an ID to the packet, and dispatches it into the community. When the packet arrives at its vacation spot IP, the related socket extracts the info from the packet and transforms it into the protocol required by the IP. Numerous packets will be in flight all through the community at any given time.
Topological types and target functions
The time period topology refers to how the constituent elements of one thing are interrelated or organized. In these discussions, the topology of an NoC refers to how the IP nodes are linked.
NoCs are extremely versatile. As illustrated within the determine beneath, along with an NoC implementation of a crossbar—this isn’t the identical as a standard crossbar swap implementation—different topologies generally deployed in immediately’s SoCs embrace 1D stars, rings and timber, together with 2D meshes and toruses. Extra complicated constructions, together with 3D cubes and 4D hypercubes, are additionally potential however are not often employed in apply.
Excessive-level representations are proven for frequent NoC topologies. Supply: Arteris
When evaluating totally different NoC topologies, a typical mega metric is the idea of wire value, which primarily embraces all of the bills, energy, space, and congestion related to the interconnect portion of the NoC. Bearing this in thoughts, a high-level abstract of the assorted NoC topologies illustrated within the above determine is as follows:
NoC crossbar topology
Benefits:
- Supplies a direct and simultaneous connection between all nodes.
- No rivalry for shared assets.
- Excessive throughput and low latency.
Disadvantages:
- Excessive wire value by way of energy for bigger programs.
- Scalability points because of the restricted variety of ports within the swap.
Comparability:
- Lowest latency and highest throughput.
- Highest energy and wire prices.
Use circumstances:
- Excessive-performance computing programs, corresponding to supercomputers or knowledge facilities, require low latency and excessive throughput for transferring massive quantities of information.
- Excessive-end graphics processing models (GPUs) and different high-speed processing models require excessive bandwidth and low latency communication.
- Some industrial interconnect suppliers supply crossbar interconnects as general-purpose options. Nonetheless, topologies like mesh or tree could also be extra acceptable for small embedded programs.
Star topology
Benefits:
Disadvantages:
- Gives solely a single level of failure within the central hub or swap—if the hub or swap fails, your entire system will fail.
- The full bandwidth of a star topology is proscribed by the capability of the central hub or swap. If the processing parts require extra bandwidth than the hub or swap can present, the system’s efficiency will probably be restricted.
- Whereas a star topology is scalable to a sure extent, it could turn out to be tough and costly to scale past a sure variety of processing parts.
- As messages should go by way of the central hub or swap, a star topology might have greater latency than a mesh or torus topology.
Use circumstances:
- Generally is a good selection for small embedded programs or shopper electronics with restricted processing parts and low bandwidth necessities. Nonetheless, it might not be appropriate for programs with excessive bandwidth necessities or the place fault tolerance and scalability are crucial.
Ring topology
Benefits:
- Low energy and wire prices.
- Supplies a assured path between nodes.
Disadvantages:
- Low scalability because of the mounted variety of nodes within the ring.
- Excessive latency brought on by messages needing to traverse your entire ring.
Comparability:
- Decrease energy and wire value in comparison with mesh and torus topologies.
- Greater latency than the mesh and tree topologies.
Use circumstances:
- Smaller designs with restricted numbers of nodes, corresponding to embedded programs or sensor networks.
- Methods by which messages have to be delivered in a particular order, corresponding to token rings in real-time programs.
Tree topology
Benefits:
- Scalable with low energy and wire prices for bigger programs.
- Fault tolerance as a consequence of having a number of paths between nodes.
Disadvantages:
- Excessive rivalry and congestion on the root of the tree.
- Greater latency than mesh topology.
Comparability:
- Decrease energy and wire prices than crossbar topology.
- Decrease latency than ring topology.
Use circumstances:
- Hierarchical programs embrace programs with an initiator-target construction or a central processing unit (CPU) with a number of peripheral gadgets.
- Clustered programs by which nodes are grouped and should talk with their group leaders.
- In comparison with a mesh topology, a tree topology will be cheaper and simpler for small programs to implement, as they require fewer wires and switches. Tree topology will also be extra power environment friendly, as knowledge will be routed on to its vacation spot with out passing by way of a number of nodes.
Mesh topology
Benefits:
- Scalable with low energy and wire prices for bigger programs.
- Fault tolerant as a consequence of having a number of paths between nodes.
Disadvantages:
- Excessive rivalry and congestion in the midst of the mesh.
- Greater latency than the crossbar topology.
Comparability:
- Decrease latency and better throughput than ring and tree topologies.
- Decrease energy and wire value than the crossbar topology.
Use circumstances:
- Methods with many nodes and average communication necessities.
- For shopper electronics or small embedded programs, a mesh topology will be higher than a crossbar topology. It’s because a mesh topology is usually cheaper and easier to implement than a crossbar topology. It makes use of fewer wires and switches, making it well-suited for smaller programs with restricted assets.
- Multi-core processors the place every core is linked to its nearest neighbors for inter-core communication.
- Mesh topologies will be useful for large-scale knowledge heart networks the place scalability and fault tolerance are important.
- Mesh topologies will also be an excellent choice for AI functions. A mesh topology supplies good fault tolerance and scalability and might adapt to totally different communication patterns and workloads.
Torus topology
Benefits:
- Supplies a pure and common structure for 2D or 3D chip designs.
- Excessive fault tolerance is because of the a number of paths between nodes.
- Low latency and excessive throughput for small- and medium-sized programs.
Disadvantages:
- Excessive energy and wire prices for bigger programs.
- Extra complicated implementation in comparison with different topologies.
Comparability:
- Decrease energy and wire value than the crossbar topology.
- Decrease latency than the ring topology.
- Greater throughput than the mesh and tree topologies.
Use circumstances:
- Methods with common 2D or 3D grid constructions, corresponding to graphics processors or video processing models.
- Massive-scale programs with excessive fault-tolerance necessities, corresponding to knowledge facilities or cloud computing programs.
- The torus is another topology for AI functions because it supplies redundant paths for knowledge transmission and ensures excessive availability and reliability. The torus topology may present scalability, as it may be simply expanded by including extra nodes.
No “one dimension matches all”
Whereas easy designs should still be glad with a single community, complicated SoCs small and huge will profit from implementing NoCs with comparable or disparate topologies.
Some SoCs make use of hierarchical tree constructions and a number of separate timber as an alternative of a single tree topology. In some circumstances, one portion of the chip, corresponding to a machine studying (ML) inference engine, might make the most of a mesh topology. On the identical time, different areas could also be higher served by a number of totally different topologies.
The principle factor to recollect is that every SoC presents distinctive interconnect challenges. NoCs supply essentially the most highly effective and versatile interconnect options obtainable. Some SoCs can profit from a combination of NoC topologies. Most significantly, there isn’t any one-size-fits-all resolution in terms of NoCs.
Choosing the right NoC topology or mixture of topologies for a particular utility just isn’t at all times a easy process. Your IP accomplice can supply recommendation on the collection of one of the best know-how in your design and its NoC necessities.
Andy Nightingale, VP of product advertising and marketing at Arteris, has over 35 years of expertise within the high-tech business, together with 23 years spent on numerous engineering and product administration positions at Arm.
Associated Content material
