Shared management of a 16 semiconductor quantum dot crossbar array

Fabrication

The gadget is fabricated on a Ge/SiGe heterostructure the place a 16-nm-thick germanium quantum nicely with a most gap mobility of two.5 × 10⁵ cm² V⁻¹ s⁻¹ is buried 55 nm under the semiconductor/oxide interface^25,40. We design the quantum dot plunger gates with a diameter of 100 nm, and the barrier gates separating the quantum dots with a width of 30 nm. The fabrication of the gadget follows these predominant steps. First, 30-nm-thick Pt ohmic contacts are patterned through electron-beam lithography, evaporated and subtle within the heterostructure following an etching step to take away the oxidized Si cap layer^41,42. A 3-layer gate stack is then fabricated by alternating the atomic layer deposition of an Al₂O₃ dielectric movie (with thicknesses of seven, 5 and 5 nm) and the evaporation of Ti/Pd metallic gates (with thicknesses of three/17, 3/27 and three/27 for every deposition, respectively). After dicing, a chip internet hosting a single crossbar array is then mounted and wire bonded on a printed circuit board. Earlier than calm down in a dilution fridge, we examined two nominally equivalent crossbar gadgets in a 4 Ok helium tub as per the screening process³⁸. Each gadgets exhibited the performance of full gates and ohmic contacts, and considered one of them was mounted in a dilution fridge.

Experimental setup

The experiment is carried out in a Bluefors dilution fridge with a base temperature of 10 mK. From a Coulomb peak evaluation, we extract an electron temperature of 138 ± 9 mK, which we use to estimate the detuning lever arm (Supplementary Figs. 12 and 13). We make the most of an in-house constructed battery-powered SPI rack (https://qtwork.tudelft.nl/~mtiggelman/spi-rack/chassis.html) to set the d.c. voltages, whereas we use a Keysight M3202A arbitrary waveform generator (AWG) to use alternating-current rastering pulses through coaxial traces. The d.c. and alternating-current voltage indicators are mixed on the printed circuit board with bias-tees and utilized to the gates. Every cost sensor is galvanically linked to a NbTiN inductor with an inductance of some microhenries, forming a resonant tank circuit with resonance frequencies of ~100 MHz. In our experiment, we’ve noticed solely three out of 4 resonances, most likely resulting from a faulty inductor. Furthermore, as a result of the 2 resonances overlap considerably, we largely keep away from utilizing reflectometry (until explicitly acknowledged within the textual content) and use quick d.c. measurements with a bandwidth of as much as 50 kHz. The 4 d.c. sensor currents are transformed into voltages, amplified and concurrently learn by a four-channel Keysight M3102A digitizer module with 500 megasamples s^–1. The digitizer module and several other AWG modules are built-in right into a Keysight M9019A peripheral element interconnect categorical extensions for the instrumentation chassis. Cost stability diagrams right here sometimes encompass a 150 × 150 pixel scan with a measurement time per pixel of fifty μs. All through this Article, we check with Δgi to establish a ramp equipped by an AWG to the gate gi with respect to a hard and fast d.c. reference voltage. To reinforce the signal-to-noise ratio, we common the identical map 5–50 occasions, acquiring a high-quality map inside a minute.

Tune-up particulars

All through the experiment, we’ve tuned all of the 16 quantum dots of the gadget two occasions. Within the first run, the gate voltages had been optimized to attenuate the variety of unintentional quantum dots to raised visualize and characterize the crossbar quantum dots (Fig. 2 and Supplementary Fig. 14). Within the second run, the stray dots had been uncared for to tune the quantum dot array into a world odd-occupation regime (Fig. 3). Between the 2 tune-up cycles, the gate voltages had been reset to zero with out thermally biking the gadget. The protocol adopted within the two tuning procedures was the identical, however the want for emptying unintentional quantum dots within the first session led to some restrictions within the voltage window of sure gates. The beginning gate-voltage values for the tune up are –300 mV for obstacles and –600 mV for plungers. In Supplementary Fig. 15, we show the d.c. gate voltages relative to the measurements displayed in Fig. 3, with the crossbar array tuned within the odd-charge occupation. On this regime, we additionally examine the variability within the first gap voltage onset in every dot, acquiring −1,660 ± 290 mV (Supplementary Fig. 16). Moreover, we characterize the variability within the transition-line spacing to be ~10–20% as a metric for the extent of homogeneity of the array (Supplementary Fig. 17)⁴³. Supplementary Observe 4 discusses methods to additional scale back these variations.

The odd-charge occupancy is demonstrated by emptying every quantum dot (Supplementary Movies 1–12). All of the datasets underlying Fig. 3 and Supplementary Movies 1–12 are taken on the identical gate-voltage configuration on the identical day. Nonetheless, throughout all of the maps, there are minimal voltage variations, the most important being a variation of 6 mV in vP1 that, nonetheless, doesn’t have an effect on the Q1, Q2b and Q2t occupancies (Supplementary Desk 1). In the course of the experiment, gate UB8 didn’t perform correctly, presumably resulting from a damaged lead. To compensate for this impact and to allow cost loading in P3t and P5t dots, we set UB7 at a decrease voltage in contrast with the opposite UB gates. Moreover, LB1 is about at a relatively larger voltage to mitigate the formation of unintentional quantum dots underneath the fanout of LB1 and P1 at decrease voltages. The primary addition line of such an unintentional quantum dot is seen as a weakly interacting horizontal line (Fig. 3a).

Digital matrix

The matrix M outlined by (bf{overrightarrow{G}}=M occasions bf{overrightarrow{{{{rm{v}}}}G}}), with digital gates (overrightarrow{{rm{v}}bf{G}}) and precise gates (overrightarrow{bf{G}}) is proven as a color map in Supplementary Fig. 3. For the tunnel coupling experiments introduced in Fig. 4, we make use of extra virtual-gate techniques for reaching impartial management of detuning voltages e67 and U67, in addition to the interdot interactions through digital obstacles t_6b7, j_6b7, t_6t7 and j_6t7. With SE_P outlined because the SE plunger gate, we write

Quantum dot identification

To acquire the capacitive coupling of all of the barrier gates to a set of transition traces (Fig. 2b), we purchase and analyse units of 112 cost stability diagrams. The identical cost stability diagram is taken after stepping every barrier gate round its present voltage in steps of 1 mV within the vary of –3 to three mV (that’s, 7 scans × 16 obstacles). The variety of cost stability diagrams required to establish all of the quantum dots scales linearly with their whole quantity. The variety of maps outcomes from the product of the variety of plungers and barrier gates, each of which scale as its sq. root. We emphasize that an array with particular person management would additionally require a linear variety of cost stability diagrams to deduce every dot. Within the evaluation, we first subtract a slowly various background to the information (with the ndimage.gaussian.filter perform of the open-source SciPy bundle model 1.7.1) after which calculate the gradient of the map (with the ndimage.gaussian_gradient_magnitude perform). For a given linecut of such two-dimensional maps, we extract the height place utilizing a Gaussian match perform. Resulting from cross-capacitance, the transition-line positions manifest a linear dependence on every of the 16 obstacles, which we quantify by extracting the linear slope (Supplementary Fig. 4). After normalization to the utmost worth, these parameters are named capacitive couplings (λ) and due to the grid construction of the 2 barrier layers, the primary info of the place the outlet is added/eliminated to/from is obtained. To extract the quantum dot positions, we think about the capacitive couplings to the vUB (λ_vUB) and vBL (λ_vLB) gates as two impartial likelihood distributions. With this strategy, the integral of λ_vUB (λ_vLB) between vUBi (vLBok) and vUBj (vLBl) returns a ‘likelihood’ p_U,(i,j) (p_L,(ok,l)) to seek out the dot between these management traces. Because of this, the mixed likelihood within the website confined by these 4 obstacles is given by the product of those parts: w_(i,j),(ok,l) = p_U,(i,j) × p_L,(ok,l). We observe that the sum of the 16 possibilities returns 1. As already noticed in one other work³², the gates cross-coupling to a particular quantum dot outlined in a germanium quantum nicely manifest a sluggish falloff in house (that’s, gates with a distance to the dot of >100 nm nonetheless have a substantial cross-coupling to the dot). This may be attributed to the quite massive vertical distance between the gates and quantum dots (>60 nm), and is in distinction with experiments in Silicon–metallic–oxide–semiconductor gadgets the place the falloff is quite instant resulting from tight cost confinement. This side explains why our likelihood W on the recognized quantum dot reaches a most of 0.25−0.50.

Tunnel coupling analysis

For the estimation of the tunnel coupling outcomes introduced in Fig. 4, we established an automatic measurement process that follows this sequence: (1) we step the digital obstacles throughout the two-dimensional map (t, j); (2) at every barrier configuration, we take a two-dimensional (e67, U67) cost stability map (Fig. 4b–g); (3) we establish the correct place of cost interdot through a becoming process of the map (Supplementary Fig. 10)⁴⁴; (4) we carry out small changes on the e67 and U67 digital gates to centre the interdot on the (0, 0) d.c. offset; (5) we measure the polarization line by utilizing ~0.1 kHz AWG ramps (Fig. 4c,h). For an correct evaluation, every polarization line is the results of a mean of 150 traces, utilizing a measurement integration time of fifty μs per pixel. With this technique, the complete 30 × 30 maps are taken in a couple of hours. We match the traces contemplating an electron temperature of 138 mK and a detuning lever arm of ({alpha }_{{epsilon }_{67}}) = 0.012(4) eV V^–1, extracted from a thermally broadened polarization line (Supplementary Fig. 13). We observe that the extracted tunnel coupling roughly follows an exponential development as a perform of barrier gates. We match the information introduced in Fig. 4e,j with the (Atimes {rm{e}}^{-B{V}_{rm{g}}}) perform, the place A is a prefactor, B is the efficient barrier lever arm and V_g is the gate axis. We discover that the efficient barrier lever arms of j_6b7 and t_6b7 are 0.007 ± 0.002 and 0.021 ± 0.003 mV⁻¹, respectively. Equally, j_6t7 and t_6t7 are 0.008 ± 0.001 and 0.026 ± 0.003 mV⁻¹, respectively. This means that the true barrier LB7 controls the vertical and horizontal couplings in the same method. Altogether, these outcomes point out that the decrease barrier layer of UB gates is ~3 occasions simpler than the higher barrier layer of LB gates. That is per what’s present in Fig. 2b and Supplementary Fig. 5. We observe that for qubit operations in such a crossbar array, it’s truly needed to totally characterize and calibrate the two-barrier tunability of all of the 24 nearest neighbours. Performing this activity requires bettering our {hardware} implementation additional and is past the scope of this work.