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In its quest to develop superior packaging, Intel has set its sights on a brand new materials for chip substrates: glass.
Glass’s stiffness and decrease coefficient ratio of thermal growth make it superior to natural substrates as a result of it doesn’t develop and warp as a lot. These properties make glass superior in dimensional scaling, similar to decreasing pitch, Pooya Tadayon, fellow and director of meeting and check pathfinding at Intel, stated in an organization roundtable dialogue on packaging final month.
“Utilizing a glass substrate permits us to introduce some attention-grabbing options and geometries that permit for improved energy supply,” Tadayon stated. “And it’s additionally an enabler for extending high-speed diodes past 224G and into the 448G house.”
Using glass substrates might be a gradual course of as instruments and manufacturing processes are developed and desires emerge. Glass will coexist with natural substrates, not substitute them, Tadayon stated.
In its superior packaging efforts, the corporate has transitioned from system-on-chip to system-in-package, stated Tom Rucker, vp of know-how growth and director of meeting and check know-how growth integration at Intel.
“This transition continues aggressively now, as we transition many product strains to our EMIB [embedded multi-die interconnect bridge] know-how,” Rucker stated. “And now, we’re additionally transferring to 3D interconnects, which help stacking of die and the place we will enhance the die depend, drive to smaller geometries and get larger efficiency—all inside one packaged unit.”
With giant bundle sizes, nonetheless, comes a mechanical problem that prompted Intel to develop its capabilities. As Tadayon famous, substrates are inclined to warp. This makes it troublesome to assemble them onto a motherboard, added Mark Gardner, senior director of foundry superior packaging at Intel.
“So we now have discovered that it helps our clients if we now have board meeting know-how, and we will work with board-assembly homes to make that course of extra seamless for our clients,” Gardner stated.
Out and in of the hopper
Amongst Intel’s newly out there merchandise and people nonetheless in growth are:
- Information Heart GPU Max, which takes benefit of just about all of Intel’s superior bundle know-how, together with 3D stacking facet by facet and EMIB. With over 100 billion transistors and 47 dies from 5 course of nodes, it was launched earlier in 2023.
- Subsequent-gen Foveros know-how, (which has gone from 50- to 36- to 25-m pitch) at 36-m pitch with the Meteor Lake processor, is deliberate to come back out in 2023.
- The flip-chip ball-grid–array platform that’s focused for manufacturing readiness in 2024. Plans are to exceed 100 mm for facet packages, lengthen the center layers and scale back the pitch to under 90 m.
- Subsequent-gen interconnects, together with co-packaged optics, use glass-based coupling (aka glass bridge) with built-in waveguides.
The glass bridge is used as a substitute of straight attaching and gluing fibers to silicon, which prevents transforming it. The “distinctive answer” permits plugging and deplugging. The coupling is focused for manufacturing by the top of 2024, Tadayon stated.
Foveros can also be focused for additional growth, and Intel will proceed pitch scaling to 9 m.
“After which trying within the subsequent era of that know-how, we intend to go under 5-m pitch for future choices,” Tadayon stated. “We can even offer some novel architectures and 3D stacking options to permit architects to attach these chips in numerous methods and benefit from the flexibleness that this platform affords.”
What’s driving these improvements?
“Packaging performs a important function in enabling compute for all segments of the ecosystem, from high-performance supercomputers to knowledge in knowledge facilities to computing on the edge, and all of the intermediate steps that retailer, transmit and act upon knowledge,” Rucker stated. “The first metrics that drive technical options [are] efficiency, scaling [and] value.”
A la carte vs. prix fixe
The chipmaker can also be tweaking its foundry companies and has discarded its all-or-nothing strategy.
Gardner described the corporate’s revamped open-system foundry mannequin, which affords extra versatile, à la carte companies associated to a product’s whole manufacturing life cycle, from product specification to testing.
“It was once you had to make use of all of our manufacturing or none of it,” he stated. “This go round, it’s very versatile.”
As well as, testing can now be carried out earlier within the manufacturing cycle, which guarantees to be a cash saver.
“The explanation that’s so necessary, if you consider Ponte Vecchio [i.e., Data Center GPU Max], it has virtually 50 items of chiplets or tiles,” Gardner stated. “If solely a kind of is discovered to be dangerous on the finish of the ultimate check, you throw all the opposite good die and a extremely costly bundle away. We’ve seen the power to have the ability to have extra of the ultimate check content material upfront.”
