Classic computing fanatic Ben Ryves has upgraded his Zilog Z80-based CP/M pc construct to boast a beneficiant 60kB of accessible transient program RAM — by dint of including a single NAND gate chip to the structure.
“It is a home-made Z80 pc I constructed again in 2010 that encompasses a 10MHz Z80 CPU with 64kB RAM that runs CP/M 3,” Ryves writes of his creation. “It could actually drive an inside LCD, TV, or VGA monitor at 320×240 (monochrome solely) and sadly is a undertaking I used to be by no means too pleased with attributable to a number of compromises I needed to make in its design – although on the time I used to be pleased sufficient I acquired it to work in any respect!”
Having upgraded an earlier eight-bit construct for full-color graphics, Ben Ryves set about boosting its accessible reminiscence. (📷: Ben Ryves)
Choosing the undertaking again up this 12 months, in an replace delivered to our consideration by Adafruit, Ryves set about including just a few upgrades — together with shade and higher-resolution graphics outputs, based mostly on the Acorn Computer systems BBC Micro show modes. The one niggle remaining: of the 64kB put in within the pc, solely 49kB was accessible to the machine’s CP/M 3.0 working system as transient program reminiscence. The answer, oddly, was to not add extra RAM — however a NAND gate chip to provide the system bank-switching capabilities.
“The reminiscence structure of banked CP/M is definitely fairly a bit easier than quite a lot of the threads I might discover on-line appeared to make out,” Ryves writes. “All you actually need is a shared widespread space on the prime of reminiscence that can at all times be accessible whatever the present state of the chosen financial institution, and reminiscence beneath that which will be switched between a number of banks. A easy option to implement a standard space in higher reminiscence is with AND (to detect the excessive tackle) and OR (to pressure the A16 excessive if it is a excessive tackle) logic.”
A single chip, with 4 two-input NAND gates, proved sufficient {hardware} to extend accessible program reminiscence by 11kB. (📷: Ben Ryves)
Becoming a single chip with 4 two-input NAND gates was sufficient to implement the bank-switching logic. The end result: a transient program space of 60kB, up from the unique 49kB. “It does eat into the quantity of reminiscence accessible on web page 0 for disk and listing buffers,” Ryves admits. “As I am loading from an SD card (which is way quicker than the floppy discs of yore) the lowered buffer area is much less of a priority to me.”
The complete write-up, which incorporates directions in constructing a banked model of CP/M, is obtainable on Ryves’ web site.
