Cadence has introduced the launch of its eighth-generation Tensilica Xtensa processor platform, the Xtensa LX8 — promising new options designed to spice up the efficiency of on-device synthetic intelligence (AI) workloads and tiny machine studying (tinyML) with out breaking energy envelopes.
“As we speak’s superior SoC designs demand even better processor subsystem efficiency. Processors based mostly on the Xtensa LX platform are extensively used right this moment in probably the most demanding audio/voice, automotive ADAS, and embedded computing functions, so we now have in depth first-hand data of our prospects’ challenges within the drive for ever-increasing system-level efficiency,” claims Cadence’s David Glasco in assist of the launch. “Key capabilities within the newest era of our industry-leading extensible processor platform allow our prospects to create much more superior domain-specific processors.”
The subsequent-generation Tensilica Xtensa LX8 guarantees boosted efficiency, new tinyML capabilities, and a 40-bit reminiscence tackle area. (📷: Cadence)
The 32-bit Xtensa LX8 is predicated on a configurable five- or seven-stage pipeline with improved department prediction for a efficiency increase, affords configurable instruction and information caches alongside versatile layer two (L2) cache reminiscence, and has the choice of including application-specific instruction set extensions, execution models, register information, and enter/output (IO) capabilities, Cadence has confirmed. It contains reminiscence safety and administration models (MPU and MMU), a 40-bit reminiscence tackle area, an built-in direct reminiscence entry (DMA) controller, and a floating level unit (FPU) providing single- and double-precision operation.
In accordance with Cadence’s inner testing, the LX8 ought to supply a lift to system-level efficiency of as much as 50 p.c over its seventh-generation predecessor — although precise efficiency and capabilities will range relying on the way it’s configured by the corporate’s prospects because it will get added into microcontrollers and systems-on-chips (SoCs).
The launch comes as Espressif, a serious consumer of LX7 core IP, has moved away from Tensilica to RISC-V for all future designs. (📷: Espressif)
On the subject of design wins and finalised specs, there may be little to report at current: whereas Cadence prospects SK Hynix and Synaptics have spoken out in assist of the core IP, neither have introduced designs — and one of many largest customers of Tensilica Xtensa IP, Espressif, lately introduced it will be transferring away from the platform in favor of the free and open-source RISC-V structure for all future chips.
The Tensilica Xtensa LX8 is delivery to unnamed “early entry prospects” now, Cadence has confirmed, with normal availability anticipated within the late third quarter of the 12 months. Extra info is obtainable on the Cadence web site.
