Representing the eighth era of the Tensilica Xtensa LX processor household from Cadence, the LX8 improves system-level efficiency by as a lot as 50%. The 32-bit RISC processor IP serves as a basis for processor and system-level designs, together with DSP, multiprocessor, interconnect, and system-level IP merchandise.
Among the many LX8’s a number of enhancements is a versatile L2 reminiscence choice, which might be configured at initialization to be a fixed-address reminiscence, L2 cache, or a mix of each. Cadence reviews efficiency enhancements of fifty% or extra for cache-based subsystems in comparison with the Xtensa LX7 processor.
Different developments embrace improved department prediction and enhanced Arm AMBA interfaces, corresponding to AMBA 4 AXI and APB supervisor interface. An built-in DMA (iDMA) controller improves 3D DMA transfers present in complicated DSP algorithms. The iDMA additionally provides compression/decompression assist and expands the bodily addressable reminiscence to 40 bits. Additional, the Xtensa LX8 accommodates as much as 128 interrupts.
The Tensilica Xtensa LX8 processor is at present transport to early entry clients, with common availability anticipated within the late third quarter of 2023.
Discover extra datasheets on merchandise like this one at Datasheets.com, searchable by class, half #, description, producer, and extra.
