PCIe 5.0 Retimer Helps CXL 2.0, Extends Hyperlinks


//php echo do_shortcode(‘[responsivevoice_button voice=”US English Male” buttontext=”Listen to Post”]’) ?>

Kandou just lately launched the Regli KB9003, one of many world’s first PCIe 5.0 retimers that additionally helps the CXL 2.0 protocol, which guarantees to grow to be a must have function for next-generation knowledge heart purposes that use accelerators (akin to compute GPUs or FPGAs), memory-expansion boards or persistent reminiscence. Samples of the chip are set to be accessible in Q3, and the corporate hopes to provoke mass manufacturing of its Regli KB9003 early subsequent 12 months.

Kandou’s Regli KB9003 is a flexible bidirectional, 16-lane PCIe 5.0 retimer that’s conscious of the CXL 2.0 protocol and helps data-transfer charges of as much as 32 GT/s. The gadget is designed to increase the PCIe hint size between the basis complicated and its endpoints, making certain the preservation of sign integrity alongside the way in which, which is achieved by dynamically offsetting channel losses as much as 36 dB (throughout energy and voltage variations) utilizing Kandou’s Autonomous Receiver Equalization (ARxE) expertise.

The Kandou Regli KB9003 PCIe 5.0 retimer.
The Kandou Regli KB9003 PCIe 5.0 retimer (Supply: Kandou)

One of many foremost options of the Regli KB9003 is its assist of CXL 2.0 retiming mode for CXL.io, CXL.cache for cache coherency and CXL.reminiscence for reminiscence coherency protocols which might be used for I/O, accelerators, memory-enhancing units and protracted reminiscence. The chip gives a typical clock mode through an elastic buffer and a separate reference clock with impartial unfold (SRIS) mode, which helps various packet-size configurations. The retimer additionally incorporates a drift buffer mode designed to attain ultra-low–latency targets, that are essential for CXL. Like several retimer, it provides latency itself, however Kandou says it’s lower than 20 ns. Further options embody varied management interfaces, a number of clock modes, safe boot and on-board diagnostics.

Block diagram of the Regli KB9003 PCIe 5.0 retimer.
Block diagram of the Regli KB9003 PCIe 5.0 retimer (Supply: Kandou)

Kandou doesn’t disclose which course of expertise it makes use of to make its Regli KB9003 however says it consumes a quite sizeable 14.4 W. It’s noteworthy that the corporate plans to supply the chip in numerous packages to fulfill the necessities of assorted purposes.

Retimers’ significance rising

PCIe has grow to be a ubiquitous interface for consumer and server PCs because of its constant evolution and common efficiency enhancements. However rising data-transfer charges to 32 GT/s over copper interconnects brings plenty of challenges in the case of routing, sign loss, noise, impendence and EMI shielding. Routing PCIe 5.0 interconnections is difficult in consumer PCs. However for server or automotive purposes, it will get considerably more durable.

The difference between a retimer and a redriver.
The distinction between a retimer and a redriver (Supply: Kandou)

To allow lengthy PCIe 5.0 interconnects in servers, one has to make use of PCIe 5.0 retimers, tiny mixed-signal analog/digital units that may totally restore knowledge, isolate the built-in clock and transmit a renewed model of the info utilizing a transparent and uncluttered clock sign. Against this, redrivers equalize and re-amplify alerts which have degraded over lengthy transmission distances, however the way in which they work, additionally they amplify noises. Trendy programs for artificial-intelligence and high-performance computing (HPC) purposes can use as many as 20 PCIe 5.0 retimers, in keeping with Kandou.

“On the AI programs, it’s troublesome to say definitively [how many retimers per system are used], as there are a number of architectures, however the high-end we now have seen is 20 in a platform,” mentioned Subhash Roy, VP of product administration at Kandou. “I’m being obscure because of every vendor having totally different architectural splits, CPU board versus riser card versus AI board because of energy/measurement.”

Kandou’s Subhash Roy.
Kandou’s Subhash Roy (Supply: Kandou)

One of many foremost challenges solved by retimers is enabling longer connections inside the system (and even exterior of it) by offsetting channel losses. On the subject of PCIe 5.0, the size of traces will get considerably shorter compared with earlier variations of the specification. Whereas there are lots of variables right here, the Regli KB9003 can lengthen hint size all the way in which to 11 inches (279 mm).

“For PCIe hyperlinks, the loss finances covers the basis complicated bundle, vias on the system board, hint size and connectors,” Roy mentioned. “The hint size varies primarily based on the selection of supplies from low-loss to ultra-low–loss and environmental circumstances, akin to temperature and humidity. Regli can lengthen the hint size attain by 5 to 11 inches, relying on these design necessities.”

The significance of retimers is tough to overestimate for high-performance machines for AI and HPC purposes operating a number of GPUs, akin to Nvidia’s DGX H100. In the meantime, the significance of the Regli KB9003 will solely develop, because the adoption of CXL 2.0 will broaden within the coming years.

“With the explosion of information required to gasoline cutting-edge workloads like AI and HPC, the necessity for superior I/O applied sciences like PCIe 5.0 and CXL 2.0 on Intel’s Xeon platforms has by no means been higher,” mentioned Jim Pappas, director of expertise initiatives at Intel. “As Intel continues to extend compute efficiency throughout its product roadmap, it’s nice to see retimer merchandise for these necessary trade requirements innovating in parallel.”

A riser card with Kandou’s Regli KB9003.
A riser card with Kandou’s Regli KB9003 (Supply: Kandou)

Kandou’s Regli KB9003 retimers are set to pattern already this quarter after which ship in business portions beginning in early 2024. Retaining in thoughts that we’re coping with data-center–grade options, it’s going to take a while for hyperscalers in addition to makers of servers to validate these retimers, after which they’re going to begin utilizing them, maybe across the time when CXL 2.0-supporting accelerators and memory-expansion options will grow to be extra widespread.

Related Articles

LEAVE A REPLY

Please enter your comment!
Please enter your name here

Latest Articles