Traditionally, automotive electronics have been powered off the identical 12-V lead-acid battery used to start out the car. Even with surges as excessive as 42 V, which might happen if the generator have been working and the battery cable was disconnected, voltages keep within the security extra-low voltage (SELV) vary beneath 60 VDC. Thus, it was not vital to fret concerning the spacing of conducting PCB traces to keep away from electrical shock hazards in automotive circuitry.
As a result of electrical car (EV) motors want greater voltages (400 V or 800 V) to function, shock hazards at the moment are a priority in automotive purposes. The identical stringent spacings that apply to the boundary between circuitry linked to the AC mains and SELV circuits powered off of utility energy, now apply to the boundary between the circuitry linked to the high-voltage batteries in EVs and the SELV circuits working off the 12-V system, corresponding to infotainment and physique electronics (primarily lighting).
Failing CISPR 25
Most of the bias provides wanted to drive high-power semiconductor switches in traction inverters working off high-voltage EV batteries are powered off the low-voltage 12-V system. The issue is that these remoted energy provides pump quite a lot of common-mode noise again into the 12-V automotive battery traces, inflicting them to fail the automotive Comité Worldwide Spécial des Perturbations Radioélectriques (CISPR) 25 carried out emissions limits, which lengthen to 108 MHz. This noise is essentially pushed by the principle switching waveform capacitively coupling between the first and secondary windings of the bias provide’s isolation transformer. Bypass capacitors with excessive surge voltage rankings (Y-capacitors) between main floor and secondary floor create a small loop to largely include this common-mode noise, and common-mode filtering on the battery traces additional scale back this noise to permit passing of CISPR 25 limits.
Spacing necessities for automotive circuitry
For strengthened spacing between high-voltage EV batteries and the low-voltage 12-V battery system utilized in most conventional automotive circuitry, a typical goal is 8 mm of spacing. This may cowl 400 VRMS, air pollution diploma 2 and materials group III; or 800 VRMS, identical air pollution diploma 2, however materials group I. For extra particulars relating to spacing necessities, see the Worldwide Electrotechnical Fee (IEC) 60664-1 normal, “Insulation coordination for tools inside low-voltage provide programs—Half 1: Rules, necessities and assessments”.
Assembly creepage and clearance necessities in multi-layer PCBs
IEC’s stringent spacing necessities are pushed by a high-voltage breakdown on surfaces uncovered to contaminated air (creepage) and a breakdown or arcing of the air itself (clearance). Inside parts that bridge the primary-secondary barrier corresponding to transformers or ICs—and likewise the inside layers of multilayer PCBs the place there isn’t any air or moisture publicity—spacing necessities are a lot much less, so long as the barrier can stand up to a several-kilovolt high-potential check. A typical check degree for ICs utilized in strengthened barrier purposes is 5 kV, which permits PCBs with 4 or extra layers to have interleaved main and secondary grounds on the inside layers. There are spacing necessities inside inside layers, however they’re considerably diminished from the necessities for air-exposed layers. For some purposes, a 1-mm spacing can be adequate for 800-V battery programs.
Demo with an remoted DC/DC converter
We constructed two boards to reveal emissions efficiency versus CISPR 25 Class 5 limits of our UCC12051-Q1 remoted DC/DC converter. This converter was designed for 5-V enter and 5-V output loaded at 100 mA with a typical battery-line electromagnetic interference filter. One board (not launched) had 8-mm spacing between the first and secondary on all 4 layers, and one board (the Remoted 5-V Bias Provide for Automotive CISPR 25, Class 5 Emissions, Reference Design) allowed the interleaving of main and secondary grounds within the two inside layers, with spacing between main and secondary grounds at 1 mm. The extra efficient capacitance from main floor to secondary floor was an estimated 11 pF. The remoted converter contained in the UCC12051-Q1 switched at 8 MHz to make sure that its first frequency of CISPR 25 concern can be its fourth harmonic at 32 MHz.
Determine 1 is snippet from the remoted 5-V reference design schematic displaying an IC remoted converter with capacitors from main floor to secondary floor to include high-frequency noise generated by the converter’s isolation transformer. The unreleased board is identical because the remoted 5-V reference design, aside from the shortage of PCB layer interleaving.
Determine 1 Main and secondary interface of the DC/DC converter within the remoted 5-V reference design displaying added bypass capacitors C100 and C101 and interleaving inner-layer capacitance. Supply: Texas Devices
Given the necessity for redundancy for security and the necessity to keep general spacing from main to secondary, we positioned two Y-capacitors (C100 and C101) in collection to bridge the first and secondary grounds. Therefore, the efficient capacitance is one-half the worth of every capacitor. Some circumstances will want three capacitors in collection—330 pF capacitors—to take care of the required spacing.
In Determine 2, the picture on the left is the not launched board with 8-mm spacing for all layers; the picture on the fitting is the remoted 5-V reference design with the highest and backside layers having 8-mm spacing and the inside layers having solely 1-mm spacing, permitting them to have overlapping main and secondary floor planes.
Determine 2: 8-mm spacing on all layers (left) versus 8-mm spacing on solely the highest and backside layers (proper): prime layer—crimson; layer 2 is darkish inexperienced; layer 3—gentle blue; layer 4—tan; overlap of layers 2 and three—gentle inexperienced; no copper on any layer—black. Supply: Texas Devices
Radiated emissions versus CISPR 25
With the remoted 5-V reference design, we anticipated that this interleaving, with its added 11 pF of capacitance between main and secondary grounds, would solely assist radiated emissions above 200 MHz. And certainly, the interleaving layers allowed radiated emissions to move CISPR 25 Class 5 for all frequencies above 200 MHz, even with out bypass capacitors C100 and C101 (Determine 3). With out the interleaving layers, we would have liked further Y-capacitors between main and secondary grounds to move in the identical frequency vary. See the check report for the emissions check setups.
Determine 3 Radiated emissions versus CISPR 25 Class 5 above 200 MHz with none further Y capacitors. This particular scan shouldn’t be within the remoted 5-V reference design check report. The board handed limits with higher than 10 dB of margin. Supply: Texas Devices
The shock was that filtering (C101 and C102) for the 30- to 108-MHz vary, with its stringent carried out emissions limits, was considerably enhanced. With 110 pF of efficient further capacitance between main floor and secondary floor, the interleaving improved the carried out noise discount all through the complete 30- to 108-MHz vary by about 4 to eight dB. Over this frequency vary, the interleaving transformed a failure by 4 dB to a move with 4 dB of margin.
Carried out emissions versus CISPR 25
Determine 4 and Determine 5 present the carried out emissions scans of those two boards, with the one distinction being the inner-layer interleaving. Each scans have been on the identical line impedance stabilization community (LISN), with the identical common-mode battery line filtering and the identical loading of 100 mA off the 5-V output.
Determine 4 Remoted 5-V reference design (with interleaving layers) carried out emissions versus CISPR 25 Class 5, 30 to 108 MHz: handed with 4.5 dB of margin, with the worst case being a “CISPR common” detection at 82 MHz. Supply: Texas Devices
Determine 5 Unreleased board (no interleaving layers) carried out emissions versus CISPR 25 Class 5, 30 to 108 MHz: failed by 3.8 dB of margin, with the worst case being a CISPR common detection at 32 MHz. Supply: Texas Devices
The interleaving layers with the estimated 11 pF of capacitance contributed much more to the filtering than including 11 pF to the efficient 110 pF of capacitance of the Y-capacitors, which might enhance filtering by about 1 dB. The inner-layer floor planes scale back the efficient inductance of the bridging Y-capacitors and permit them to raised shunt these high-frequency harmonics.
This filtering enchancment provides to the advantages of close-in floor planes, enhancing the efficiency of capacitor filtering whether or not the objective is to restrict output noise, management emissions in non-isolated purposes, or scale back stresses and failures on semiconductors.
Josh Mandelcorn has been at Texas Instrument’s Energy Design Providers group for nearly twenty years centered on designing energy options for automotive and communications purposes. He has designed high-current multiphase converters to energy core and reminiscence rails of processors dealing with giant speedy load modifications with stringent voltage below / overshoot necessities. He beforehand designed off-line AC to DC converters within the 250W to 2 kW vary with a give attention to emissions compliance. He’s listed as both an creator or co-author on 17 US patents associated to energy conversion.
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